A scalable multiprocessor architecture using Cartesian Network-Relative Addressing
Citable URI:
http://hdl.handle.net/1721.1/14200
| Title: | A scalable multiprocessor architecture using Cartesian Network-Relative Addressing |
| Author: | Morrison, Joseph Derek |
| Other Contributors: | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. |
| Advisor: | Stephen A. Ward. |
| Department: | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. |
| Publisher: | Massachusetts Institute of Technology |
| Issue Date: | 1989 |
| Description: |
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1989. Includes bibliographical references (leaves 101-102). |
| URI: | http://hdl.handle.net/1721.1/14200 |
| Keywords: | Electrical Engineering and Computer Science. |
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