Advanced Search
DSpace@MIT

Scheduling of Batch Processors in Semiconductor Manufacturing – A Review

Research and Teaching Output of the MIT Community

Show simple item record

dc.contributor.author Mathirajan, M.
dc.contributor.author Appa Iyer, Sivakumar
dc.date.accessioned 2003-11-29T20:51:29Z
dc.date.available 2003-11-29T20:51:29Z
dc.date.issued 2003-01
dc.identifier.uri http://hdl.handle.net/1721.1/3755
dc.description.abstract In this paper a review on scheduling of batch processors (SBP) in semiconductor manufacturing (SM) is presented. It classifies SBP in SM into 12 groups. The suggested classification scheme organizes the SBP in SM literature, summarizes the current research results for different problem types. The classification results are presented based on various distributions and various methodologies applied for SBP in SM are briefly highlighted. A comprehensive list of references is presented. It is hoped that, this review will provide a source for other researchers/readers interested in SBP in SM research and help simulate further interest. en
dc.description.sponsorship Singapore-MIT Alliance (SMA) en
dc.format.extent 362263 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.relation.ispartofseries Innovation in Manufacturing Systems and Technology (IMST);
dc.subject scheduling en
dc.subject batch processor en
dc.subject semiconductor manufacturing system en
dc.subject review en
dc.subject classification en
dc.title Scheduling of Batch Processors in Semiconductor Manufacturing – A Review en
dc.type Article en


Files in this item

Name Size Format Description
IMST021.pdf 353.7Kb PDF

This item appears in the following Collection(s)

Show simple item record

MIT-Mirage