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dc.contributor.authorTang, Brian D.
dc.contributor.authorBoning, Duane S.
dc.date.accessioned2003-12-14T23:41:10Z
dc.date.available2003-12-14T23:41:10Z
dc.date.issued2004-01
dc.identifier.urihttp://hdl.handle.net/1721.1/3901
dc.description.abstractLong the dominant method of wafer planarization in the integrated circuit (IC) industry, chemical-mechanical polishing is starting to play an important role in microelectromechnical systems (MEMS). We present an experiment to characterize a polysilicon CMP process with the specific goal of examining MEMS sized test structures. We utilize previously discussed models and examine whether the same assumptions from IC CMP can be made for MEMS CMP. We find that CMP at the MEMS scale is not just pattern density dependent, but also partly dependent on feature size. Also, we find that new layout designs relevant to MEMS can negatively impact how well existing CMP models simulate polishing, motivating the need for further model development.en
dc.description.sponsorshipSingapore-MIT Alliance (SMA)en
dc.format.extent247912 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.relation.ispartofseriesInnovation in Manufacturing Systems and Technology (IMST);
dc.subjectchemical-mechanical polishingen
dc.subjectpolysiliconen
dc.subjectMEMSen
dc.subjectCMPen
dc.subjectplanarizationen
dc.titleCharacterization and Modeling of Chemical-Mechanical Polishing for Polysilicon Microstructuresen
dc.typeArticleen


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