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A 4kb memory array for MRAM development

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dc.contributor.advisor John K. DeBrosse and Anantha P. Chandrakasan. en_US
dc.contributor.author Qazi, Masood en_US
dc.contributor.other Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.date.accessioned 2008-05-19T15:00:13Z
dc.date.available 2008-05-19T15:00:13Z
dc.date.copyright 2007 en_US
dc.date.issued 2007 en_US
dc.identifier.uri http://hdl.handle.net/1721.1/41552
dc.description Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007. en_US
dc.description This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. en_US
dc.description Includes bibliographical references (p. 129-131). en_US
dc.description.abstract The circuits for a A 4kb array of Magnetic Tunnel Junctions (MTJs) have been designed and fabricated in a 0:18¹m CMOS process with three levels of metal. Support circuitry for addressing, reading, writing, and test mode probing enables the characterization of the switching of a thin-film ferromagnetic layer in the MTJs. Specifically, novel mechanisms involving spin-transfer or thermal assistance can be studied and compared to current MRAM designs that switch the MTJ with current-induced magnetic fields. Using this array design, both high speed digital and quasi-static dI/dV experiments can be conducted to investigate the nature of the MTJ resistance hysteresis and process variation in addition to the switching behavior under both polarities of current. en_US
dc.description.statementofresponsibility by Masood Qazi. en_US
dc.format.extent 131 p. en_US
dc.language.iso eng en_US
dc.publisher Massachusetts Institute of Technology en_US
dc.rights M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. en_US
dc.rights.uri http://dspace.mit.edu/handle/1721.1/7582 en_US
dc.subject Electrical Engineering and Computer Science. en_US
dc.title A 4kb memory array for MRAM development en_US
dc.title.alternative Four kilobyte memory array for Magnetic Random Access Memory development en_US
dc.type Thesis en_US
dc.description.degree M.Eng. en_US
dc.contributor.department Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.identifier.oclc 220933302 en_US


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