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A Theory of Plans for Electronic Circuits

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dc.contributor.author de Kleer, Johan
dc.date.accessioned 2008-08-26T14:41:27Z
dc.date.available 2008-08-26T14:41:27Z
dc.date.issued 1977-04
dc.identifier.uri http://hdl.handle.net/1721.1/41966
dc.description This report describes research done at the Artificial Intelligence Laboratory of the Massachusetts Institute of Technology. Support for the Laboratory's artificial intelligence research is provided in part by the Advanced Research Projects Agency of the Department of Defense under Office of Naval Research contract N00014-75-C-0643. en
dc.description.abstract A plan for a device assigns purposes to each of the more primitive components and explains how these components interact to achieve the desired behavior of the composite device. Such an information structure is critically important in analyzing, designing or troubleshooting devices. The first goal of this research is to develop a theory of plans for electronic circuits which can be used for these purposes. The second goal is the construction of a system which can automatically recognize a plan for a circuit from a geometrical representation of the circuit's schematic diagram. Recognition is a process which recaptures the plan the designer originally had in mind. A theory of schemata will be introduced in which recognition is viewed as the identification of an instance of a schema in the library with the particular circuit being recognized. This process is guided by topological and geometric evidence extracted from the circuit schematic. Causal reasoning, using the technique of propagation of constraints, provides further evidence. One important use of causal reasoning is the confirmation of tentative instantiations based on topological and geometric evidence alone. en
dc.description.sponsorship MIT Artificial Intelligence Laboratory Department of Defense Advanced Research Projects Agency en
dc.language.iso en_US en
dc.publisher MIT Artificial Intelligence Laboratory en
dc.relation.ispartofseries MIT Artificial Intelligence Laboratory Working Papers, WP-144;
dc.title A Theory of Plans for Electronic Circuits en
dc.type Working Paper en


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