| dc.contributor.author |
Lewis, P. M., II |
en_US |
| dc.date.accessioned |
2010-02-01T22:40:22Z |
|
| dc.date.available |
2010-02-01T22:40:22Z |
|
| dc.date.issued |
1954-10-15 |
en_US |
| dc.identifier |
RLE_QPR_035_XV |
en_US |
| dc.identifier.uri |
http://hdl.handle.net/1721.1/51234 |
|
| dc.description |
Contains a report on a research project. |
en_US |
| dc.language.iso |
en |
en_US |
| dc.publisher |
Research Laboratory of Electronics (RLE) at the Massachusetts Institute of Technology (MIT) |
en_US |
| dc.relation.ispartof |
Massachusetts Institute of Technology, Research Laboratory of Electronics, Quarterly Progress Report, October 15, 1954 |
en_US |
| dc.relation.ispartof |
Network Synthesis |
en_US |
| dc.relation.ispartofseries |
Massachusetts Institute of Technology. Research Laboratory of Electronics. Quarterly Progress Report, no. 35 |
en_US |
| dc.rights |
Copyright (c) 2008 by the Massachusetts Institute of Technology. All rights reserved. |
en_US |
| dc.subject.other |
Network Synthesis |
en_US |
| dc.subject.other |
Voltage Transfer Synthesis |
en_US |
| dc.subject.other |
RLC Lattice |
en_US |
| dc.title |
Network Synthesis |
en_US |
| dc.type |
Technical Report |
en_US |