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Title:
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Yield-driven iterative robust circuit optimization algorithm |
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Author:
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Li, Yan; Stojanović, Vladimir |
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Department:
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science |
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Publisher:
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Institute of Electrical and Electronics Engineers |
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Issue Date:
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2009-08 |
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Abstract:
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This paper proposes an equation-based multi-scenario iterative robust
optimization methodology for analog/mixed-signal circuits.
We show that due to local circuit performance monotonicity in random
variations constraint maximization can be used to efficiently
find critical constraints and worst-case scenarios of random process
variations and populate them into a multi-scenario optimization.
This algorithm scales gracefully with circuit size and is tested on
both two-stage and fully differential folded-cascode operational amplifiers
with a 90 nm predictive model. The improving yield-trends
are confirmed across process and random variations with Hspice
Monte-Carlo simulations. |
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URI:
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http://hdl.handle.net/1721.1/58966
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Other Identifiers:
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INSPEC Accession Number: 10844460 |
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ISBN:
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978-1-6055-8497-3 |
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ISSN:
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0738-100X |
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Citation:
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Yan Li; Stojanovic, V.; , "Yield-driven iterative robust circuit optimization algorithm," Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE , vol., no., pp.599-604, 26-31 July 2009. Copyright 2009 ACM |
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Version:
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Final published version |
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Terms of Use:
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. |
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Published as:
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http://doi.acm.org/10.1145/1629911.1630065
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Journal:
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Proceedings of the 46th ACM/IEEE Design Automation Conference, 2009 |