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A CMOS Current-Mode Dynamic Programming Circuit

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Author(s)
Mak, Terrence
•
Lum, Kai-Pui
•
Ng, H. S.
•
Rachmuth, Guy
•
Poon, Chi-Sang
Date Issued
July 2010
Journal
IEEE Transactions on Circuits and Systems I: Regular Papers
Publisher
Institute of Electrical and Electronics Engineers
Citation
Mak, T. et al. “A CMOS Current-Mode Dynamic Programming Circuit.” Circuits and Systems I: Regular Papers, IEEE Transactions on PP.99 (2010): 1-12. © Copyright 2010 IEEE
Version
Final published version
Abstract
Dynamic programming (DP) is a fundamental algorithm for complex optimization and decision-making in many engineering and biomedical systems. However, conventional DP computation based on digital implementation of the Bellman–Ford recursive algorithm suffers from the “curse of dimensionality” and substantial iteration delays which hinder utility in real-time applications. Previously, an ordinary differential equation system was proposed that transforms the sequential DP iteration into a continuous-time parallel computational network. Here, the network is realized using a CMOS current-mode analog circuit, which provides a powerful computational platform for power-efficient, compact, and high-speed solution of the Bellman formula. Test results for the fabricated DP optimization chip demonstrate a proof of concept for this solution approach. We also propose an error compensation scheme to minimize the errors attributed to nonideal current sources and device mismatch.
Subjects
fabrication and testing
dynamic programming
current-mode circuit design
continuous-time formulation
Bellman’s equation
MIT Department
Harvard University--MIT Division of Health Sciences and Technology
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
http://hdl.handle.net/1721.1/59393
DOI of Published Version
https://doi.org/10.1109/TCSI.2010.2052661
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