Department:Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science
Publisher:Institute of Electrical and Electronics Engineers
Date Issued:2010-05
Abstract:
We developed a through-substrate copper-damascene interconnect technology in silicon with minimal impedance. Via impedance was extracted using parameter measurements at 50 GHz that were matched to simple circuit models. The extracted impedance shows resistances ≤ 1 [Ohm], record-low inductance for aspect ratios > 4, and sidewall capacitance that approaches the theoretical value. For an aspect ratio of 10 (10 in diameter and 100 high), the through-substrate via has an average inductance of 36 pH at 10 GHz, resistance of 0.6 at 1 GHz, and sidewall capacitance of 0.3 pF.
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