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Title:
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RF power potential of 45 nm CMOS technology |
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Author:
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Gogineni, Usha; del Alamo, Jesus A.; Putnam, Christopher |
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Department:
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science |
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Publisher:
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Institute of Electrical and Electronics Engineers |
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Issue Date:
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2010-03 |
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Abstract:
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This paper presents the first measurements of the RF power performance of 45 nm CMOS devices with varying device widths and layouts. We find that 45 nm CMOS can deliver a peak output power density of around 140 mW/mm with a peak power-added efficiency (PAE) of 70% at 1.1 V. The PAE and P[subscript out] decrease with increasing device width because of a decrease in the maximum oscillation frequency (f[subscript max]) for large width devices. The PAE also decreases with increasing frequency because of a decrease in gain as the operating frequency approaches f[subscript max]. The RF power performance of 45 nm devices is shown to be very similar to that of 65 nm devices. |
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URI:
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http://hdl.handle.net/1721.1/59846
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Other Identifiers:
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INSPEC Accession Number: 11155408 |
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ISBN:
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978-1-4244-5456-3 |
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Citation:
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Gogineni, U., J.A. del Alamo, and C. Putnam. “RF power potential of 45 nm CMOS technology.” Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010 Topical Meeting on. 2010. 204-207. © 2010 Institute of Electrical and Electronics Engineers. |
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Version:
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Final published version |
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Terms of Use:
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. |
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Published as:
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http://dx.doi.org/10.1109/SMIC.2010.5422960
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Journal:
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2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) |
