Decimator implementation for a pipelined oversampling analog-to-digital converter
Name
40487620-MIT.pdf
Description
Full printable version
Size
15.5 MB
Format
Adobe PDF
Checksum (MD5)
1f0a87bb3ed0b53e62b49c09609707ce
Author(s)
Goodrich, John A. (John Alexander), 1974-
Advisor(s)
Hae-Seung Lee.
Alternative Title
Decimator implementation for a pipelined oversampling A/D converter
Date Issued
1998
Publisher
Massachusetts Institute of Technology
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
Includes bibliographical references (leaf 59).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission.
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission.
Persistent DSpace Link
