A 0.6V, 8mW 3D Vision Processor for a Navigation Device for the Visually Impaired
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ISSCC_submit_final.pdf
Size
612.56 KB
Format
Adobe PDF
Checksum (MD5)
88010c507042cbbb107e4c6f6e3440ee
Author(s)
Jeon, Dongsuk
Ickes, Nathan
Raina, Priyanka
Wang, Hsueh-Cheng
Rus, Daniela L.
Chandrakasan, Anantha P.
Date Issued
January 2016
Journal
Proceedings of the 2016 IEEE International Solid-State Circuits Conference
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Jeon, Dongsuk, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, and Anantha P. Chandrakasan. "A 0.6V, 8mW 3D Vision Processor for a Navigation Device for the Visually Impaired." 2016 IEEE International Solid-State Circuits Conference (January 2016).
Version
Author's final manuscript
Abstract
This paper presents an energy-efficient computer vision processor for a navigation device for the visually impaired. Utilizing a shared parallel datapath, out-of-order processing and co-optimization with hardware-oriented algorithms, the processor consumes 8mW at 0.6V while processing 30 fps input data stream in real time. The test chip fabricated in 40nm is demonstrated as a core part of a navigation device based on a ToF camera, which successfully detects safe areas and obstacles.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://submissions.mirasmart.com/isscc2016/PDF/ISSCC2016AdvanceProgram.pdf
