A constraint-based systems approach to line yield improvement in semiconductor wafer fabrication
Name
31311556-MIT.pdf
Description
Full printable version
Size
5.99 MB
Format
Adobe PDF
Checksum (MD5)
ae1c5e0b5ea734fca3df9b25ec0e6112
Author(s)
Menon, Viju S. (Viju Sreedhara)
Advisor(s)
Charles H. Fine.
Date Issued
1994
Publisher
Massachusetts Institute of Technology
Description
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
Includes bibliographical references (p. 105-106).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Persistent DSpace Link