Advanced data bus architecture using CDMA for highly reliable systems
Name
216930359-MIT.pdf
Description
Full printable version
Size
1.46 MB
Format
Adobe PDF
Checksum (MD5)
71be9a400aeb664e68c69313157fc257
Author(s)
Haque, Naoshin
Advisor(s)
Sharon L. Donald, Joel E. Schindall and Alejandro D. Dominguez-Garcia.
Date Issued
2007
Publisher
Massachusetts Institute of Technology
Abstract
Conventional fault-tolerant architectures require extensive cross-strapping of redundant modules. The purpose of this thesis is to prove the feasibility of the use of code division multiple access (CDMA) to permit shared data bus architecture for fault-tolerant applications. Four families of pseudorandom codes, the Barker, gold, maximal length, and GPS C/A codes, were evaluated for their performances with respect to minimum signal gain under different uncertainties, such as varying voltage and noise levels. For data buses with three devices, the GPS C/A code performed the best. A voting process consisting of two rounds of voting, based on an extension of a solution to the Byzantine general's problem, was used to demonstrate that CDMA could be used successfully to contain a single fault in a data bus with three devices. Finally, extensions of this thesis were considered, such as having a variable number of devices on the advanced data bus system.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 69-70).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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