A 220-to-320-GHz FMCW Radar in 65-nm CMOS Using a Frequency-Comb Architecture
Name
JSSC_2020_Comb_Radar_Accepted.pdf
Description
Accepted version
Size
6.22 MB
Format
Adobe PDF
Checksum (MD5)
0042b939cbdaade23dee8ffb715d1307
Author(s)
Yi, Xiang
Wang, Cheng
Chen, Xibi
Wang, Jinchen
Grajal, Jes ́us
Han, Ruonan
Date Issued
September 2020
Journal
IEEE Journal of Solid-State Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Yi, Xiang et al. “A 220-to-320-GHz FMCW Radar in 65-nm CMOS Using a Frequency-Comb Architecture.” IEEE Journal of Solid-State Circuits (September 2020) © 2020 The Author(s)
Version
Author's final manuscript
Abstract
This article presents a CMOS-based, ultra-broadband frequency-modulated continuous-wave (FMCW) radar using a terahertz (THz) frequency-comb architecture. The high-parallelism spectral sensing provided by this architecture significantly reduces the bandwidth requirement for the THz front-end circuitry and ensures that the peak output power and sensitivity are maintained across the entire band of operation. The speed and linearity of frequency chirping are also improved by the comb system. An antenna-sharing scheme based on a square-mixer-first architecture is used, which not only leads to compact size but also facilitates the stitching of the multichannel radar IF data. To avoid the usage of high-cost silicon lens in the on-chip broadband radiation, a multi-resonance substrate-integrated-waveguide (SIW) antenna structure is innovated, which provides 15% fractional bandwidth for impedance matching. As a proof of concept, a five-tone radar prototype that seamlessly scans the entire 220-to-320-GHz band is demonstrated. In the measurement, the multi-channel-aggregated equivalent-isotropically radiated power (EIRP) is 0.6 dBm and is further boosted to ~20 dBm with a TPX (polymethylpentene) lens. The measured minimum single-sideband noise figure (SSB NF) of the receiver, including the antenna loss and baseband amplifier, is 22.8 dB. Due to the comb architecture, the EIRP and NF values fluctuate by only 8.8 and 14.6 dB, respectively, across the 100-GHz bandwidth. The chip has a die size of 5 mm² and consumes 840 mW of dc power. This work marks the first CMOS demonstration of THz radar and achieves record bandwidth and ranging resolution among all radar front-end chips.
MIT Department
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/JSSC.2020.3020291
