Design and Implementation of a Packet Switched Routing Chip
Name
MIT-LCS-TR-482.pdf
Size
5.15 MB
Format
Adobe PDF
Checksum (MD5)
72514694996ca041e5aae5b6f96f082b
Author(s)
Joerg, Christopher Frank
Date Issued
December 1990
Series/Report no.
MIT-LCS-TR-482
Abstract
Monsoon is a parallel processing dataflow computer that will require a high bandwidth interconnection network. A packet switched routing chip (PaRC) is described that will be used as the basis of this network. PaRC is a 4 by 4 routing switch which has been designed and fabricated as a CMOS gate array.
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