Serially connected monolayer MoS FETs with channel patterned by a 7.5 nm resolution directed self-assembly lithography
Name
Serially-Connected-Monolayer-MoS2-FETs-with-Channel-Patterned-by-a-7.5-nm-Resolution-Directed-Self-Assembly-Lithography.pdf
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410.77 KB
Format
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Checksum (MD5)
757fe196b13b965d0996debe1c43250d
Author(s)
Nourbakhsh, Amirhasan
Zubair, Ahmad
Tavakkoli Kermani Ghariehali, Amir
Sajjad, Redwan Noor
Ling, Xi
Dresselhaus, Mildred
Kong, Jing
Berggren, Karl K
Antoniadis, Dimitri A
Palacios, Tomas
Date Issued
September 2016
Journal
2016 IEEE Symposium on VLSI Technology
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Nourbakhsh, A. et al. “Serially Connected Monolayer MoS2 FETs with Channel Patterned by a 7.5 Nm Resolution Directed Self-Assembly Lithography.” 2016 IEEE Symposium on VLSI Technology, Honolulu, HI, USA, 14-16 June, 2016. IEEE, 2016. 1–2.
Version
Author's final manuscript
Abstract
We demonstrate sub-10 nm transistor channel lengths by directed self-assembly patterning of monolayer MoS[subscript 2] in a periodic chain of homojunction semiconducting-(2H) and metallic-phase (1T') MoS[subscript 2] regions with half-pitch of 7.5 nm. The MoS[subscript 2] composite transistor possesses an off-state current of 100 pA/μm and an I[subscript
on]/I[subscript off] ratio in excess of 10[subscript 5]. Modeling of the resulting current-voltage characteristics reveals that the 2H/1T' MoS[subscript 2] homojunction has a resistance of 75 Ω.μm while the 2H-MoS[subscript 2] exhibits low-field mobility of ~8 cm[superscript 2]/V.s and carrier injection velocity of ~10[superscript 6] cm/s.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Massachusetts Institute of Technology. Plasma Science and Fusion Center
Massachusetts Institute of Technology. Research Laboratory of Electronics
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DOI of Published Version
https://doi.org/10.1109/VLSIT.2016.7573376
