High speed analog-to-digital conversion with silicon photonics
Name
Holzwarth-2009-High speed analog-to-digital conversion with silicon photonics.pdf
Size
1.17 MB
Format
Adobe PDF
Checksum (MD5)
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Author(s)
Schulein, Robert T.
Grein, Matthew E.
Yoon, Jung Uk
Lennon, Donna M.
Geis, Michael W.
Lyszczarz, Theodore M.
Spector, Steven Jay
Zhou, G. R.
Smith, Henry Ignatius
Ram, Rajeev J.
Date Issued
February 2009
Journal
Proceedings of SPIE
Publisher
The International Society for Optical Engineering
Citation
Holzwarth, C. W. et al. “High speed analog-to-digital conversion with silicon photonics.” Silicon Photonics IV. Ed. Joel A. Kubby & Graham T. Reed. San Jose, CA, USA: SPIE, 2009. 72200B-15. © 2009 SPIE--The International Society for Optical Engineering
Version
Final published version
Abstract
Sampling rates of high-performance electronic analog-to-digital converters (ADC) are fundamentally limited by the timing jitter of the electronic clock. This limit is overcome in photonic ADC's by taking advantage of the ultra-low timing jitter of femtosecond lasers. We have developed designs and strategies for a photonic ADC that is capable of 40 GSa/s at a resolution of 8 bits. This system requires a femtosecond laser with a repetition rate of 2 GHz and timing jitter less than 20 fs. In addition to a femtosecond laser this system calls for the integration of a number of photonic components including: a broadband modulator, optical filter banks, and photodetectors. Using silicon-on-insulator (SOI) as the platform we have fabricated these individual components. The silicon optical modulator is based on a Mach-Zehnder interferometer architecture and achieves a V[subscript pi]L of 2 Vcm. The filter banks comprise 40 second-order microring-resonator filters with a channel spacing of 80 GHz. For the photodetectors we are exploring ion-bombarded silicon waveguide detectors and germanium films epitaxially grown on silicon utilizing a process that minimizes the defect density.
MIT Department
Lincoln Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
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DOI of Published Version
http://dx.doi.org/10.1117/12.808952
