Modeling Multiprogrammed Caches
Name
MIT-LCS-TM-488.pdf
Size
5.38 MB
Format
Adobe PDF
Checksum (MD5)
08d8f1e35f4477a589127e5bae931cbf
Author(s)
Agarwal, Anant
Series/Report no.
MIT-LCS-TM-488
Abstract
This paper presents a simple, yet accurate, model for multiprogrammed caches and validates it against trace-driven simulation. The model takes into account nonstationary behavior of processes and process sharing. By making judicious approximations, the paper shows that a very simple expression of the form u^2(p - 1)/tS accurately models the multiprogramming component of the miss rate of large direct-mapped caches. In the above expression, t is the context-switching interval, S is the cache size in blocks, p is the number of processes, and u is the number of unique blocks accesses by a process during the interval t.
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