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  4. Cliffhanger: Scaling Performance Cliffs in Web Memory Caches

Cliffhanger: Scaling Performance Cliffs in Web Memory Caches

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Author(s)
Cidon, Asaf
•
Eisenman, Assaf
•
Katti, Sachin
•
Alizadeh Attar, Mohammadreza
Date Issued
March 2016
Journal
Proceedings of 13th USENIX Symposium on Networked Systems Design and Implementation
Publisher
USENIX Association
Citation
Cidon, Asaf et al. "Cliffhanger: Scaling Performance Cliffs in Web Memory Caches." 13th USENIX Symposium on Networked Systems Design and Implementation, Santa Clara, California, 16-18 March, 2016.
Version
Author's final manuscript
Abstract
Web-scale applications are heavily reliant on memory cache systems such as Memcached to improve throughput and reduce user latency. Small performance improvements in these systems can result in large end-to-end gains. For example, a marginal increase in hit rate of 1% can reduce the application layer latency by over 35%. However, existing web cache resource allocation policies are workload oblivious and first-come-first-serve. By analyzing measurements from a widely used caching service, Memcachier, we demonstrate that existing cache allocation techniques leave significant room for improvement. We develop Cliffhanger, a lightweight iterative algorithm that runs on memory cache servers, which incrementally optimizes the resource allocations across and within applications based on dynamically changing workloads. It has been shown that cache allocation algorithms underperform when there are performance cliffs, in which minor changes in cache allocation cause large changes in the hit rate. We design a novel technique for dealing with performance cliffs incrementally and locally. We demonstrate that for the Memcachier applications, on average, Cliffhanger increases the overall hit rate 1.2%, reduces the total number of cache misses by 36.7% and achieves the same hit rate with 45% less memory capacity.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
http://creativecommons.org/licenses/by-nc-sa/4.0/
Persistent DSpace Link
http://hdl.handle.net/1721.1/110700
DOI of Published Version
https://www.usenix.org/node/194949
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