10 Gbps TCP/IP streams from the FPGA for the CMS DAQ eventbuilder network
Name
G_Bauer_2013_J._Inst._8_C12039.pdf
Description
Published version
Size
1.95 MB
Format
Adobe PDF
Checksum (MD5)
0a84fce579967d52b505431ef2455eb3
Author(s)
Bauer, Gerry P
Bawej, T
Behrens, U
Branson, J
Chaze, O
Cittolin, S
Coarasa, J A
Darlea, Georgiana-Lavinia
Deldicque, C
Dobson, M
Date Issued
December 2013
Journal
Journal of Instrumentation
Publisher
IOP Publishing
Citation
Bauer, G. et al. "10 Gbps TCP/IP streams from the FPGA for the CMS DAQ eventbuilder network." Journal of Instrumentation 8 (December 2013): C12039 © 2013 CERN
Version
Final published version
Abstract
For the upgrade of the DAQ of the CMS experiment in 2013/2014 an interface between the custom detector Front End Drivers (FEDs) and the new DAQ eventbuilder network has to be designed. For a loss-less data collection from more then 600 FEDs a new FPGA based card implementing the TCP/IP protocol suite over 10Gbps Ethernet has been developed. We present the hardware challenges and protocol modifications made to TCP in order to simplify its FPGA implementation together with a set of performance measurements which were carried out with the current prototype.
MIT Department
Massachusetts Institute of Technology. Laboratory for Nuclear Science
Terms of Use
Creative Commons Attribution 3.0 unported license
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1088/1748-0221/8/12/c12039
