Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory
Name
MIT-LCS-TM-466.pdf
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9.63 MB
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Adobe PDF
Checksum (MD5)
5ecf8d76a4852e164668351482c347dc
Author(s)
Prasanna, G.N. Srinivasa
Agarwal, Anant
Musicus, Bruce R.
Date Issued
October 1992
Series/Report no.
MIT-LCS-TM-466
Abstract
This paper presents a hierarchical approach for compiling macro dataflow graphs for multiprocessors with local memory. Macro dataflow graphs comprise several nodes (or macros operations) that must be executed subject to prespecified precedence constraints. Programs consisting of multiple nested loops, where the precedence constraints between the loops are known, can be viewed as macro dataflow graphs. The hierarchical compilation approach comprises a processor allocation phase followed by a partitioning phase. In the processor allocation phase, using estimated speedup functions for the macro nodes, computationally efficient techniques establish the sequencing and parallelism of macro operations for close-to-optimal run times. The second phase partitions the computations in each macro node to maximize communication locality for the level of parallelism determined by the processor allocation phase. The same approach can also be used for programs consisting of multiple loop nests, when each of the nested loops can be characterized by a speedup function. These ideas have been implemented in a prototype structure-driven compiler, SDC, for expressions of matrix operations. The paper presents the performance of the compiler for several matrix expressions on a simulator of the Alewife multiprocessor.
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