The integration of InGaP LEDs with CMOS on 200 mm silicon wafers
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Author(s) • • • • • • • • •
Wang, Bing
Lee, Kwang Hong
Wang, Cong
Wang, Yue
Made, Riko I.
Sasangka, Wardhana Aji
Nguyen, Viet Cuong
Lee, Kenneth Eng Kian
Tan, Chuan Seng
Yoon, Soon Fatt
Date Issued
February 2017
Journal
Proceedings of SPIE--the Society of Photo-Optical Instrumentation Engineers
Publisher
SPIE
Citation
Wang, Bing et al. “The Integration of InGaP LEDs with CMOS on 200 Mm Silicon Wafers.” Proceedings of SPIE, Smart Photonic and Optoelectronic Integrated Circuits XIX, January 28 - February 2 2017, Bellingham, Washington, USA, edited by Louay A. Eldada et al., SPIE, February 2017: © 2017 SPIE
Version
Final published version
Abstract
The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.
MIT Department
Massachusetts Institute of Technology. Department of Materials Science and Engineering
Massachusetts Institute of Technology. Microphotonics Center
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DOI of Published Version
https://doi.org/10.1117/12.2252030