Fabrication and Thermal Budget Considerations of Advanced Ge and InP SOLES Substrates
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Fitzgerald_Fabrication and.pdf
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Author(s)
Pacella, Nan Y.
Bulsara, Mayank
Drazek, Charlotte
Guiot, Eric
Fitzgerald, Eugene A
Date Issued
May 2015
Journal
ECS Journal of Solid State Science and Technology
Publisher
Electrochemical Society
Citation
Pacella, N. Y., M. T. Bulsara, C. Drazek, E. Guiot, and E. A. Fitzgerald. “Fabrication and Thermal Budget Considerations of Advanced Ge and InP SOLES Substrates.” ECS Journal of Solid State Science and Technology 4, no. 7 (May 7, 2015): P258–P264.
Version
Final published version
Abstract
The Silicon on Lattice Engineered Substrate (SOLES) platform enables monolithic integration of III-V compound semiconductor (III-V) and silicon (Si) complementary metal oxide semiconductor (CMOS) devices. The SOLES wafer provides a device quality Si-on-Insulator (SOI) layer for CMOS device fabrication and an embedded III-V device template layer which serves as a seed surface for epitaxial growth of III-V devices. In this work, different approaches for fabricating SOLES wafers comprised of Ge and InP template layers are characterized and InP-based SOLES structures are demonstrated for the first time. Ge-based SOLES are robust for long durations at temperatures up to 915°C and Ge diffusion can be controlled by engineering the oxide isolation layers adjacent to the Ge. InP SOLES structures alleviate lattice and thermal expansion mismatches between the template layer and subsequent device layers. Although allowable processing temperatures for these wafers had been expected to be higher due to the higher melting temperature of InP, high indium diffusion through the SiO[subscript 2] and InP melting actually lead to lower thermal stability. This research elucidates approaches to enhance the process flexibility and wafer integrity of Ge-based and InP-based SOLES.
MIT Department
Massachusetts Institute of Technology. Materials Processing Center
Massachusetts Institute of Technology. Department of Materials Science and Engineering
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Creative Commons Attribution-NonCommercial-NoDerivs License
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DOI of Published Version
https://doi.org/10.1149/2.0221507jss
