Compact modeling of circuits and devices in Verilog-A
Name
826502878-MIT.pdf
Description
Full printable version
Size
3.72 MB
Format
Adobe PDF
Checksum (MD5)
1b1b6efc4dbe2ab835983c4fb0528860
Author(s)
Mysore, Omar
Advisor(s)
Luca Daniel.
Date Issued
2012
Publisher
Massachusetts Institute of Technology
Abstract
The compact model of a circuit or device is a system of linear and/or nonlinear differential equations that effectively models the behavior of the circuit or device. Compact modeling plays a critical role in circuit simulation, because in order to simulate a circuit with a specific component, the compact model of this component is needed in the circuit simulator. Two contributions related to compact modeling in Verilog-A are presented in this thesis. The first contribution is an analysis of the feasibility and performance of the Verilog-A language in the context of implementing reduced order models. Reduced order models are a class of purely mathematical compact models, which are significantly faster than compact models based on the physics of a device or system. The second contribution of this thesis is the implementation of a novel MOSFET model in Verilog-A. This MOSFET model is known as the Virtual Source model.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.
Cataloged from PDF version of thesis.
Includes bibliographical references (p. 57-58).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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reproduction or distribution in any format is prohibited without written
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