Development of the recess mounting with monolithic metallization optoelectronic integrated circuit technology for optical clock distribution applications
Name
164908512-MIT.pdf
Description
Full printable version
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18.94 MB
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Checksum (MD5)
80d04bc836f8c2dc160af24764a8afa4
Author(s)
Atmaca, Eralp, 1976-
Advisor(s)
Clifton G. Fonstad, Jr.
Date Issued
2007
Publisher
Massachusetts Institute of Technology
Abstract
Recess mounting with monolithic metallization, or RM3 integration, is used to integrate Ino.47Ga0.53As/InP based lattice-matched high quantum efficiency p-i-n photodetectors on silicon chips to build high performance optoelectronic integrated circuits [1]. In RM3 integration, partially processed heterostructure devices are placed in recesses formed in the dielectric layers covering the surface of an integrated circuit chip, the surface is planarized, and monolithic processing is continued to transform the heterostructures into optoelectronic devices monolithically integrated with the underlying electronic circuitry. Two different RM3 techniques have been investigated, Aligned Pillar Bonding (APB) and OptoPill Assembly (OPA). APB integrates lattice mismatched materials using aligned, selective area wafer bonding at reduced temperature (under 3500C), which protects the electronic chips from the adverse effects of high temperatures, and reduces the thermal expansion mismatch concerns. In the OPA technique, optoelectronic heterostructures are processed into circular pills of 8 gm height and 45 gm diameter, the pills are released from the substrate, and collected through a process that involves decanting.
(cont.) The pills are then assembled into recesses on silicon chips using manual pick & place techniques, and they are bonded to the metal pads on the bottom surface of the recesses using a Cu-AuSn solder bond. A new magnet assisted bonding technique is utilized to obtain clamping pressure to form the solder bond. The gap between the pill and the surrounding recess is filled using BCB, which also provides good surface planarization.
Description
Thesis (Elec. E.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2007.
Includes bibliographical references (p. 123-128).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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