Extraction of Virtual-Source Injection Velocity in sub-100 nm III-V HFETs
Name
Kim-2009-Extraction of Virtual-Source Injection Velocity in sub-100 nm III-V HFETs.pdf
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Author(s)
Brar, B.
Kim, D. H.
del Alamo, Jesus A.
Antoniadis, Dimitri A.
Date Issued
March 2010
Journal
2009 IEEE International Electron Devices Meeting (IEDM)
Publisher
Institute of Electrical and Electronics Engineers
Citation
Kim, D.-H. et al. “Extraction of virtual-source injection velocity in sub-100 nm III–V HFETs.” Electron Devices Meeting (IEDM), 2009 IEEE International. 2009. 1-4. © 2010 Institute of Electrical and Electronics Engineers.
Version
Final published version
Abstract
We have experimentally extracted the virtual-source electron injection velocity, vx0, of various III-V HFETs at room temperature. This is the carrier velocity that matters for logic applications of these transistors. Sub-100 nm devices with mu n > 10,000 cm2/V-s exhibit vx0 in excess of 3 x 107 cm/s even at V[subscript DD] = 0.5 V. This is over 2 times that of state-of-the-art Si devices at V[subscript DD]> 1. We have verified our extraction methodology for vx0 by building a simple charge-based semi-empirical model for the I-V characteristics of III-V HFETs. This model yields an excellent description of the entire I-V characteristics of the devices from subthreshold to inversion and from linear to saturation regimes with fitted electron velocities that are very close to those independently obtained through our proposed extraction methodology.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
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DOI of Published Version
https://doi.org/10.1109/IEDM.2009.5424268
