Scalability of sub-100 nm thin-channel InAs PHEMTs
Name
Kim-2009-Scalability of sub-100 nm thin-channel InAs PHEMTs.pdf
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1.06 MB
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Author(s)
del Alamo, Jesus A.
Kim, Dae-Hyun
Date Issued
May 2009
Journal
IEEE International Conference on Indium Phosphide & Related Materials, 2009. IPRM '09
Publisher
Institute of Electrical and Electronics Engineers
Citation
Dae-Hyun Kim, and J.A. del Alamo. “Scalability of sub-100 nm thin-channel InAs PHEMTs.” Indium Phosphide & Related Materials, 2009. IPRM '09. IEEE International Conference on. 2009. 132-135. © 2009 Institute of Electrical and Electronics Engineers.
Version
Final published version
Abstract
We have experimentally investigated the role of thinning down the channel thickness and using high InAs composition as a channel material, which aims to improve the electrostatic integrity of the device as well as high frequency characteristics of the device. To do so, we have fabricated InAs PHEMTs with tch = 10 nm, together with reference In0.7Ga0.3As PHEMTs with tch = 13 nm. In comparison with reference In0.7Ga0.3As ones, InAs PHEMTs with tch = 10 nm exhibit excellent electrostatic integrity of the device down to Lg = 30 nm regime, such as subthreshold swing (S=75 mV/dec), DIBL = 84 mV/V and gm_max = 1.9 mS/mm at VDS = 0.5 V. Besides, InAs PHEMTs with Lg = 30 nm show outstanding fT = 600 GHz and fmax = 490 GHz at VDS = 0.5 V. More importantly, InAs PHEMTs exhibit a far better scaling behaviors, down to Lg = 30 nm regimes. Indeed, InAs is a promising choice of the channel material for future THz and logic applications.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
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DOI of Published Version
https://doi.org/10.1109/ICIPRM.2009.5012459
