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An algorithm for improved delay-scaling in input-queued switches

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Author(s)
Weng, Wentao
•
Srikant, R.
Date Issued
January 15, 2022
Publisher
Springer US
Citation
Weng, Wentao and Srikant, R. 2022. "An algorithm for improved delay-scaling in input-queued switches."
Version
Author's final manuscript
Abstract
Abstract We consider an $$n\times n$$ n × n input-queued switch with uniform Bernoulli traffic and study the delay (or equivalently, the queue length) in the regime where the size of the switch n and the load (denoted by $$\rho $$ ρ ) simultaneously become large. We devise an algorithm with expected total queue length equal to $$O((n^{5/4}(1-\rho )^{-1})\log \max (1/\rho ,n))$$ O ( ( n 5 / 4 ( 1 - ρ ) - 1 ) log max ( 1 / ρ , n ) ) for large n and $$\rho $$ ρ such that $$(1-\rho )^{-1} \ge n^{3/4}$$ ( 1 - ρ ) - 1 ≥ n 3 / 4 . This result improves the previous best queue length bound in the regime $$n^{3/4}< (1-\rho )^{-1} < n^{7/4}$$ n 3 / 4 < ( 1 - ρ ) - 1 < n 7 / 4 . Under same conditions, the algorithm has an amortized time complexity $$O(n+(1-\rho )^2 n^{7/2} / \log \max (1/\rho ,n))$$ O ( n + ( 1 - ρ ) 2 n 7 / 2 / log max ( 1 / ρ , n ) ) . The time complexity becomes O(n) when $$(1-\rho )^{-1} \ge n^{5/4}.$$ ( 1 - ρ ) - 1 ≥ n 5 / 4 .
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
https://hdl.handle.net/1721.1/141072
DOI of Published Version
https://doi.org/10.1007/s11134-021-09726-7
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