ORION 2.0: A Power-Area Simulator for Interconnection Networks
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Peh_Orion 2.0 A Power.pdf
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293.93 KB
Format
Adobe PDF
Checksum (MD5)
3ce73ae1128e0f67da9c3bcee7629f60
Author(s)
Kahng, Andrew B.
Li, Bin
Peh, Li-Shiuan
Samadi, Kambiz
Date Issued
March 2011
Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
Institute of Electrical and Electronics Engineers
Citation
Kahng, Andrew B. et al. “ORION 2.0: A Power-Area Simulator for Interconnection Networks.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2011): n. pag. Web. 9 Dec. 2011.
Version
Author's final manuscript
Abstract
As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. In this work, we present ORION 2.0, an enhanced NoC power and area simulator, which offers significant accuracy improvement relative to its predecessor, ORION 1.0.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike 3.0
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/TVLSI.2010.2091686
