A zero-crossing based pipelined analog-to-digital converter with supply voltage scalibility
Name
711090582-MIT.pdf
Description
Full printable version
Size
5.91 MB
Format
Adobe PDF
Checksum (MD5)
4f77b97958bc93883e5c38875863034f
Author(s)
Lee, Sunghyuk
Advisor(s)
Anantha P. Chandrakasan and Hae-Seung Lee.
Alternative Title
Zero-crossing based pipelined ADC with supply voltage scalibility
Date Issued
2010
Publisher
Massachusetts Institute of Technology
Abstract
A zero-crossing based pipelined analog-to-digital converter (ADC) has been designed and is fabricated in a 65nm CMOS process. The highly digital implementation characteristic of the zero-crossing detection technique enables energy efficient operation and voltage scaling. Supply voltage scaling based on the required sampling frequency and resolution provides high energy efficiency over a wide range of sampling frequencies and resolutions. A two phase charge transfer scheme (course charge transfer and fine charge transfer) is used to achieve high speed and high resolution. Using switched capacitor circuit, two phase charge transfer scheme is implemented without increasing power and circuit complexity.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.
Cataloged from PDF version of thesis.
Includes bibliographical references (p. 73-76).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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reproduction or distribution in any format is prohibited without written
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