Generating infrastructure for FPGA-accelerated applications
Name
FPL13.pdf
Description
Accepted version
Size
569.77 KB
Format
Adobe PDF
Checksum (MD5)
77b00e0c0092d98ccd05d371fa45b860
Author(s)
King, Myron
Khan, Asif
Agarwal, Abhinav
Arvind, Arvind
Date Issued
September 2013
Journal
2013 23rd International Conference on Field programmable Logic and Applications
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
King, Myron, Asif Khan, Abhinav Agarwal, Oriol Arcas and Arvind. "Generating infrastructure for FPGA-accelerated applications." Paper presented at the 2013 23rd International Conference on Field programmable Logic and Applications, Porto, Portugal, 2-4 September 2013.
Version
Author's final manuscript
Abstract
Whether for use as the final target or simply a rapid prototyping platform, programming systems containing FPGAs is challenging. Some of the difficulty is due to the difference between the models used to program hardware and software, but great effort is also required to coordinate the simultaneous execution of the application running on the microprocessor with the accelerated kernel(s) running on the FPGA. In this paper we present a new methodology and programming model for introducing hardware-acceleration to an application running in software. The application is represented as a data-flow graph and the computation at each node in the graph is specified for execution either in software or on the FPGA using the programmer's language of choice. We have implemented an interface compiler which takes as its input the FIFO edges of the graph and generates code to connect all the different parts of the program, including those which communicate across the hardware/software boundary. Our methodology and compiler enable programmers to effectively exploit FPGA acceleration without ever leaving the application space.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/FPL.2013.6645495
