Self-aligned fabrication of vertical, fin-based structures
Name
063209_1_6.0004047.pdf
Description
Published version
Size
3.98 MB
Format
Adobe PDF
Checksum (MD5)
b349a90a1a63292740e47e7fc4214de1
Author(s)
Perozek, Joshua
Palacios, Tomás
Date Issued
December 9, 2024
Journal
Journal of Vacuum Science & Technology B
Publisher
AIP Publishing
Citation
Joshua Perozek, Tomás Palacios; Self-aligned fabrication of vertical, fin-based structures. J. Vac. Sci. Technol. B 1 November 2024; 42 (6): 063209.
Version
Final published version
Abstract
Modern power devices rely on complex, three-dimensional, vertical designs to increase their power density, ease their thermal management, and improve their reliability. However, fabrication techniques have historically relied on 2D processes for patterning lateral features. This work presents a new technology that uses multiple steps of angled depositions to fabricate self-aligned vertical, fin-based devices that avoid fundamental lithography resolution and alignment limitations. The fabrication flows of two devices, the self-aligned vertical finFET and the high-κ dielectric fin diode, are presented to demonstrate how angled depositions can readily achieve transistors with submicrometer, vertical gates in a source-first process and also create high-aspect ratio GaN fins with a record 70:1 aspect ratio.
MIT Department
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Terms of Use
Creative Commons Attribution
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1116/6.0004047
