Gate-all-around n-MOSFETs with uniaxial tensile strain-induced performance enhancement scalable to sub-10-nm nanowire diameter
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Hashemi-2009-Gate-All-Around n-MO.pdf
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Author(s)
Gomez, Leonardo
Hashemi, Pouya
Hoyt, Judy L.
Date Issued
March 2009
Journal
IEEE Electron Device Letters
Publisher
Institute of Electrical and Electronics Engineers
Citation
Hashemi, P., L. Gomez, and J.L. Hoyt. “Gate-All-Around n-MOSFETs With Uniaxial Tensile Strain-Induced Performance Enhancement Scalable to Sub-10-nm Nanowire Diameter.” Electron Device Letters, IEEE 30.4 (2009): 401-403. © 2009 IEEE
Version
Final published version
Abstract
The effects of high-level uniaxial tensile strain on the performance of gate-all-around (GAA) Si n-MOSFETs are investigated for nanowire (NW) diameters down to 8 nm. Suspended strained-Si NWs with ~2-GPa uniaxial tension were realized by nanopatterning-induced unilateral relaxation of ultrathin-body 30% strained-Si-directly-on-insulator substrates. Based on these NWs, GAA strained-Si n-MOSFETs were fabricated with a Si thickness of ~8 nm and NW widths in the range of 50 nm down to 8 nm. The GAA strained-Si MOSFETs show excellent subthreshold swing and cutoff behavior, and approximately two times current drive and intrinsic transconductance enhancement compared to similar unstrained Si devices.
Subjects
uniaxial tensile
strained Si
nanowire (NW)
n-MOSFET
Gate all around (GAA)
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
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DOI of Published Version
http://dx.doi.org/10.1109/LED.2009.2013877
