A trigger-based middleware cache for ORMs
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Madden_A trigger-based.pdf
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Author(s) • •
Gupta, Priya
Zeldovich, Nickolai
Madden, Samuel R.
Date Issued
December 2011
Journal
Middleware 2011
Publisher
Springer Berlin / Heidelberg
Citation
Gupta, Priya, Nickolai Zeldovich, and Samuel Madden. “A Trigger-Based Middleware Cache for ORMs.” Middleware 2011. Ed. Fabio Kon & Anne-Marie Kermarrec. LNCS Vol. 7049. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. 329–349.
Version
Author's final manuscript
Abstract
Caching is an important technique in scaling storage for high-traffic web applications. Usually, building caching mechanisms involves significant effort from the application developer to maintain and invalidate data in the cache. In this work we present CacheGenie, a caching middleware which makes it easy for web application developers to use caching mechanisms in their applications. CacheGenie provides high-level caching abstractions for common query patterns in web applications based on Object-RelationalMapping (ORM) frameworks. Using these abstractions, the developer does not have to worry about managing the cache (e.g., insertion and deletion) or maintaining consistency (e.g., invalidation or updates) when writing application code.
We design and implement CacheGenie in the popular Django web application framework, with PostgreSQL as the database backend and memcached as the caching layer. To automatically invalidate or update cached data, we use triggers inside the database. CacheGenie requires no modifications to PostgreSQL or memcached. To evaluate our prototype, we port several Pinax web applications to use our caching abstractions. Our results show that it takes little effort for application developers to use CacheGenie, and that CacheGenie improves throughput by 2-2.5× for read-mostly workloads in Pinax.
Description
ACM/IFIP/USENIX 12th International Middleware Conference, Lisbon, Portugal, December 12-16, 2011. Proceedings
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.1007/978-3-642-25821-3_17