Large-area NbN superconducting nanowire avalanche photon detectors with saturated detection efficiency
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Berggren_Large-area NbN.pdf
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Author(s)
Murphy, Ryan P.
Grein, Matthew E.
Gudmundsen, Theodore J.
Najafi, Faraz
Berggren, Karl K.
Marsili, Francesco
Dauler, Eric A.
McCaughan, Adam N.
Date Issued
April 2015
Journal
Proceedings of SPIE--the International Society for Optical Engineering
Publisher
SPIE
Citation
Murphy, Ryan P., Matthew E. Grein, Theodore J. Gudmundsen, Adam McCaughan, Faraz Najafi, Karl K. Berggren, Francesco Marsili, and Eric A. Dauler. “Large-Area NbN Superconducting Nanowire Avalanche Photon Detectors with Saturated Detection Efficiency.” Edited by Mark A. Itzler and Joe C. Campbell. Advanced Photon Counting Techniques IX (May 13, 2015). © 2015 Society of Photo-Optical Instrumentation Engineers (SPIE)
Version
Final published version
Abstract
Superconducting circuits comprising SNSPDs placed in parallel—superconducting nanowire avalanche photodetectors, or SNAPs—have previously been demonstrated to improve the output signal-to-noise ratio (SNR) by increasing the critical current. In this work, we employ a 2-SNAP superconducting circuit with narrow (40 nm) niobium nitride (NbN) nanowires to improve the system detection efficiency to near-IR photons while maintaining high SNR. Additionally, while previous 2-SNAP demonstrations have added external choke inductance to stabilize the avalanching photocurrent, we show that the external inductance can be entirely folded into the active area by cascading 2-SNAP devices in series to produce a greatly increased active area. We fabricated series-2-SNAP (s2-SNAP) circuits with a nanowire length of 20 μm with cascades of 2-SNAPs providing the choke inductance necessary for SNAP operation. We observed that (1) the detection efficiency saturated at high bias currents, and (2) the 40 nm 2-SNAP circuit critical current was approximately twice that for a 40 nm non-SNAP configuration.
MIT Department
Lincoln Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Research Laboratory of Electronics
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DOI of Published Version
https://doi.org/10.1117/12.2178322
