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  5. Feasibility of a 16bit, 3MSPS multibit per stage pipeline ADC using digital calibration

Feasibility of a 16bit, 3MSPS multibit per stage pipeline ADC using digital calibration

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Author(s)
Courcy, Matthew Louis, 1973-
Advisor(s)
Hae-Seung Lee.
Date Issued
1988
Publisher
Massachusetts Institute of Technology
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science; and, Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1988.
Includes bibliographical references (p. 115-116).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Persistent DSpace Link
http://hdl.handle.net/1721.1/50392
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