Cryogenic characterization of a ferroelectric field-effect-transistor
Name
042902_1_online.pdf
Description
Published version
Size
1.81 MB
Format
Adobe PDF
Checksum (MD5)
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Author(s)
Wang, Zheng
Ying, Hanbin
Chern, Winston
Yu, Shimeng
Mourigal, Martin
Cressler, John D
Khan, Asif I
Date Issued
January 28, 2020
Journal
Applied Physics Letters
Publisher
AIP Publishing
Citation
Zheng Wang, Hanbin Ying, Winston Chern, Shimeng Yu, Martin Mourigal, John D. Cressler, Asif I. Khan; Cryogenic characterization of a ferroelectric field-effect-transistor. Appl. Phys. Lett. 27 January 2020; 116 (4): 042902.
Version
Final published version
Abstract
A ferroelectric field-effect transistor (FeFET) with scaled dimensions (170 nm and 24 nm of gate width and length, respectively) and a 10 nm thick Si doped HfO2 ferroelectric in the gate oxide stack are characterized at cryogenic temperatures down to 6.9 K. We observe that a decrease in temperature leads to an increase in the memory window at the expense of an increased program/erase voltage. This is consistent with the increase in the ferroelectric coercive field due to the suppression of thermally activated domain wall creep motion at cryogenic temperatures. However, the observed insensitivity of the location of the memory window with respect to temperature cannot be explained by the current understanding of the device physics of FeFETs. Such temperature dependent studies of scaled FeFETs can lead to useful insights into their underlying device physics, while providing an assessment of the potential of this emerging technology for cryogenic memory applications.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.1063/1.5129692
