A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS
Name
Qazi-2010-A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier.pdf
Size
2.04 MB
Format
Adobe PDF
Checksum (MD5)
0c1f7df2a50c3e88e155c442a8f51df6
Author(s)
Qazi, Masood
Stawiasz, Kevin
Chang, Leland
Chandrakasan, Anantha P.
Date Issued
February 2010
Journal
IEEE International Solid-State Circuits Conference (ISSCC). Digest of technical papers
Publisher
Institute of Electrical and Electronics Engineers
Citation
Qazi, M. et al. “A 512kb 8T SRAM Macro Operating down to 0.57V with an AC-coupled Sense Amplifier and Embedded Data-retention-voltage Sensor in 45nm SOI CMOS.” Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International. 2010. 350-351. Copyright © 2010, IEEE
Version
Final published version
Abstract
An 8T SRAM fabricated in 45 nm SOI CMOS exhibits voltage scalable operation from 1.2 V down to 0.57 V with access times from 400 ps to 3.4 ns. Timing variation and the challenge of low-voltage operation are addressed with an AC-coupled sense amplifier. An area efficient data path is achieved with a regenerative global-bitline scheme. Finally, a data-retention-voltage sensor is developed to predict the mismatch-limited minimum-standby voltage without corrupting the content of the memory.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/ISSCC.2010.5433818
