Algorithmic approaches to circuit enumeration problems and applications
Name
FTL_R_1982_07.pdf
Size
4.79 MB
Format
Adobe PDF
Checksum (MD5)
172b7a998ffc8a5a3e0611173460c761
Author(s)
Lee, Boon Chai
Date Issued
1982
Publisher
Cambridge, Mass. : Massachusetts Institute of Technology, Dept. of Aeronautics & Astronautics, Flight Transportation Laboratory, [1982]
Series/Report no.
FTL report (Massachusetts Institute of Technology. Flight Transportation Laboratory) ; R82-7
Abstract
A review of methods of enumerating elementary cycles and circuits is presented. For the directed planar graph, a geometric view of circuit generation is introduced making use of the properties of dual graphs. Given the set of elementary cycles or circuits, a particular algorithm is recommended to generate all simple circuits. A simple example accompanies each of the methods discussed. Some methods of reducing the size of the graph but maintaining all circuits are introduced. Worst-case bounds on computational time and space are also given. The problem of enumerating elementary circuits whose cost is less than a certain fixed cost is solved by modifying an existing algorithm. The cost of a circuit is the sum of the cost of the arcs forming the circuit where arc costs are not restricted to be positive. Applications of circuits with particular properties are suggested.
Description
June 1982
Also issued as an M.S. thesis, Dept. of Aeronautics and Astronautics, 1982
Includes bibliographical references (p. 129-132)
Subjects
Graph theory
Algorithms
Data processing
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