Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution
Name
attaluri-nithyaa-meng-eecs-2023-thesis.pdf
Description
Thesis PDF
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2.24 MB
Format
Adobe PDF
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Author(s)
Attaluri, Nithya
Advisor(s)
Sanchez, Daniel
Date Issued
June 2023
Publisher
Massachusetts Institute of Technology
Abstract
Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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