Choosing a gate dielectric for graphene based transistors
Name
392629383-MIT.pdf
Description
Full printable version
Size
2.12 MB
Format
Adobe PDF
Checksum (MD5)
4d74797f1c193002a84dcff8f1ac39ef
Author(s)
Hsu, Pei-Lan, M. Eng. Massachusetts Institute of Technology
Advisor(s)
Jing Kong and Jakub Kedzierski.
Date Issued
2008
Publisher
Massachusetts Institute of Technology
Abstract
Much attention has recently been focused on graphene as an alternative semiconductor to silicon. Transistors with graphene conduction channels have only recently been fabricated and their performance remains to be optimized. In this thesis, different candidate gate dielectric materials are examined for use in graphene transistors. Evaporated HfO2 is ultimately used as the gate dielectric for graphene field effect transistors (FETs) on six different graphene samples. Two types of graphene were used: graphene made from the sublimation of SiC and epitaxial graphene synthesized by chemical vapor deposition (CVD) onto nickel. Electrical performance of the graphene transistors were found to vary significantly depending on the local graphene microstructure. The gate dielectric was found to crack on thick regions of graphene but stay intact on thin regions. Dielectric charging resulted in hysteretic effects in device performance. As consistent with HfO2 used in silicon CMOS devices, electron mobilities were lower than hole mobilities in the fabricated graphene FETs.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
Includes bibliographical references (p. 91-97).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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