A Formal Framework for Modular Synchronous System Design
Name
fme03.pdf
Description
Accepted version
Size
256.16 KB
Format
Adobe PDF
Checksum (MD5)
f138f4b5cacfc5db652ec9df9ac99916
Author(s)
Marinescu, Maria-Cristina V
Rinard, Martin C
Date Issued
2003
Journal
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Publisher
Springer Berlin Heidelberg
Citation
A Formal Framework for Modular Synchronous System Design. 12th International Symposium of Formal Methods Europe, FME 2003, September 8, 2003 - September 14, 2003. 2003. Springer Verlag.
Version
Author's final manuscript
Abstract
We present the formal framework for a novel approach for specifying and automatically implementing systems such as digital circuits and network protocols. The goal is to reduce the design time and effort required to build correct, efficient, complex systems and to eliminate the need for the designer to deal directly with global synchronization and concurrency issues. Our compiler automatically transforms modular and asynchronous specifications of circuits written in our specification language, into tightly coupled, fully synchronous implementations in synthesizable Verilog. We formally state the correctness theorems and give an outline of the correctness proofs for two of the three main techniques that our compiler implements. © Springer-Verlag Berlin Heidelberg 2003.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1007/978-3-540-45236-2_27
