DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling
Name
MIT-CSAIL-TR-2012-004.pdf
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768.99 KB
Format
Adobe PDF
Checksum (MD5)
dc5dcfed10a9eaed1b8ebf839a2a5592
Author(s)
Sun, Chen
Chen, Chia-Hsin Owen
Kurian, George
Wei, Lan
Miller, Jason
Agarwal, Anant
Peh, Li-Shiuan
Stojanovic, Vladimir
Advisor(s)
Li-Shiuan Peh
Date Issued
February 8, 2012
Series/Report no.
MIT-CSAIL-TR-2012-004
Abstract
With the advent of many-core chips that place substantial demand on the NoC, photonics has been investigated as a promising alternative to electrical NoCs. While numerous opto-electronic NoCs have been proposed, their evaluations tend to be based on fixed numbers for both photonic and electrical components, making it difficult to co-optimize. Through our own forays into opto-electronic NoC design, we observe that photonics and electronics are very much intertwined, reflecting a strong need for a NoC modeling tool that accurately models parameterized electronic and photonic components within a unified framework, capturing their interactions faithfully. In this paper, we present a tool, DSENT, for design space exploration of electrical and opto-electrical networks. We form a framework that constructs basic NoC building blocks from electrical and photonic technology parameters. To demonstrate potential use cases, we perform a network case study illustrating data-rate tradeoffs, a comparison with scaled electrical technology, and sensitivity to photonics parameters.
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