Physical Fault Tolerance of Nanoelectronics
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Szkopek-2011-Physical Fault Toler.pdf
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Author(s)
Szkopek, Thomas
Roychowdhury, Vwani P.
Antoniadis, Dimitri A.
Damoulakis, John N.
Date Issued
April 2011
Journal
Physical Review Letters
Publisher
American Physical Society
Citation
Szkopek, Thomas et al. “Physical Fault Tolerance of Nanoelectronics.” Physical Review Letters 106 (2011). © 2011 American Physical Society.
Version
Final published version
Abstract
The error rate in complementary transistor circuits is suppressed exponentially in electron number, arising from an intrinsic physical implementation of fault-tolerant error correction. Contrariwise, explicit assembly of gates into the most efficient known fault-tolerant architecture is characterized by a subexponential suppression of error rate with electron number, and incurs significant overhead in wiring and complexity. We conclude that it is more efficient to prevent logical errors with physical fault tolerance than to correct logical errors with fault-tolerant architecture.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.1103/PhysRevLett.106.176801
