Performance Tradeoffs in Multithreaded Processors
Name
MIT-LCS-TR-501.pdf
Size
1.85 MB
Format
Adobe PDF
Checksum (MD5)
baa8bcb037401e1749ab8c7254ae814e
Author(s)
Agarwal, Anant
Date Issued
April 1991
Series/Report no.
MIT-LCS-TR-501
Abstract
High network latencies in large-scale multiprocessors can cause a significant drop in processor utilization. By maintaining multiple process contexts in hardware and switching among them in a few cycles, multithreaded processors can overlap computation with memory accesses and reduce processor idle time.
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