Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles
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Author(s) • •
Khurana, Harneet Singh
Chandrakasan, Anantha P
Lee, Hae-Seung
Date Issued
May 2018
Journal
2018 IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Khurana, Harneet Singh et al. "Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles." 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy, Institute of Electrical and Electronics Engineers (IEEE), May 2018 © 2018 IEEE
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Author's final manuscript
Abstract
Least Significant Bit-first (LSB-first) algorithm is suitable for low-activity signals as it reduces DAC activity and the number of bit-cycles required per conversion. However, certain code transitions degrade performance by requiring large switching energy and number of bit-cycles even when the code change over previous code is small. This paper addresses it by a new algorithm called Recode then LSB-first (RLSB-first) that reduces the switching energy required for all cases of small code change across the full range of possible previous sample codes. The energy reduction is achieved while maintaining a low number of bit-cycles per conversion.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/iscas.2018.8350901