A Terahertz Molecular Clock on CMOS Using High-Harmonic-Order Interrogation of Rotational Transition for Medium-/Long-Term Stability Enhancement
Name
2020_JSSC_2nd_Gen_Molecular_Clock_accepted.pdf
Description
Accepted version
Size
4.96 MB
Format
Adobe PDF
Checksum (MD5)
dd89133067494e1a6e670d108e789bc2
Author(s)
Wang, Cheng
Yi, Xiang
Kim, Mina
Yang, Qingyu Ben
Han, Ruonan
Date Issued
2021
Journal
IEEE Journal of Solid-State Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Wang, Cheng, Yi, Xiang, Kim, Mina, Yang, Qingyu Ben and Han, Ruonan. 2021. "A Terahertz Molecular Clock on CMOS Using High-Harmonic-Order Interrogation of Rotational Transition for Medium-/Long-Term Stability Enhancement." IEEE Journal of Solid-State Circuits, 56 (2).
Version
Author's final manuscript
Abstract
© 1966-2012 IEEE. Chip-scale molecular clocks (CSMCs) perform frequency stabilization by referencing to the rotational spectra of polar gaseous molecules. With, potentially, the 'atomic' clock grade stability, cm3-level volume, and < 100-mW dc power, CSMCs are highly attractive for the synchronization of the high-speed radio access network (RAN), precise positioning, and distributed array sensing. However, the medium-/long-term stability of CSMCs is hindered by the transmission baseline tilting due to the uneven frequency response of the spectroscopic system and the molecular cell. To enhance the medium-/long-term stability, this article presents a CSMC architecture locking to the high-odd-order dispersion curve of the 231.061-GHz rotational spectral line of carbonyl sulfide (OCS) molecules, which is selected as the clock reference. A monolithic THz transceiver generates a high-precision, wavelength-modulated probing signal. Then, the wave-molecule interaction inside the molecular cell translates the frequency error between the probing signal and the spectral line center to the periodic intensity fluctuation. Finally, the CSMC locks to the third-order dispersion curve after a phase-sensitive lock-in detection. In addition, a pair of slot array couplers is employed as an effective chip-to-molecular cell interface. It leads to not only a higher SNR but also a significantly simplified CSMC package. Implemented on a 65-nm CMOS process, the high-order CSMC presents a measured Allan deviation of 4.3× 10-11 under an averaging time of τ=103 s while consuming 70.4-mW dc power.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/JSSC.2020.3021335
