A −80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency
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BLE_WuRx_CICC.pdf
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624.13 KB
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Checksum (MD5)
0288cda714eb08a4e8f00b55c4308129
Author(s)
Abdelhamid, Mohamed Radwan
Paidimarri, Arun
Chandrakasan, Anantha P
Date Issued
May 2018
Journal
2018 IEEE Custom Integrated Circuits Conference (CICC)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Abdelhamid, Mohamed et al. "A −80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency." 2018 IEEE Custom Integrated Circuits Conference (CICC), April 2018, San Diego, California, USA, Institute of Electrical and Electronics Engineers (IEEE), May 2018 © 2018 IEEE
Version
Author's final manuscript
Abstract
This paper presents an FSK wake-up receiver with a -80 dBm sensitivity using a packet structure and a duty cycling scheme compliant with the Bluetooth Low Energy (BLE) protocol trading off power with latency. Event-driven applications achieve power lower than 240nW from a 0.75V supply while latency-critical systems wake up in almost 200μW at a 230μW consumption. A within-bit LC oscillator duty-cycling scheme is proposed to provide an extra 24% power reduction. Additionally, a custom FSK transmitter can trigger wake-up at 17nW only for an average latency of 5 seconds.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/cicc.2018.8357099
