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Optimizing Synchronous Systems

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MIT-LCS-TM-215.pdf

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Author(s)
Leiserson, Charles E.
•
Saxe, James B.
Date Issued
March 1982
Series/Report no.
MIT-LCS-TM-215
Abstract
The complexity of integrated-circuit chips produced today makes it feasible to build inexpensive, special-purpose subsystems that rapidly solve sophisticated problems on behalf of a general-purpose host computer. This paper contributes to the design methodology of efficient VLSI algorithms. We present a transformation that converts synchronous systems into more time-efficient, systolic implementations by removing combinatorial rippling. The problem of determining the optimized system can be reduced to the graph-theoretic single-destination-shortest-paths problem. More importantly from an engineering standpoint, however, the kinds of rippling that can be removed from a circuit at essentially no cost can be easily characterized. For example, if the only global communication in a system is broadcasting from the host computer, the broadcast can always be replaced by local communication.
Persistent DSpace Link
https://hdl.handle.net/1721.1/149025
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